Tiny Reduced Instruction Set Computer
(TRISC) Processor

Source Code: GitHub

Project Overview

TRISC is a simple 4-bit processor that was created on a Terasic DE10-Lite FPGA using Quartus Prime with the Verilog HDL. It features an Arithmetic Logic Unit, Control Unit, Accumulator, Program Counter, and Random Access Memory. It can perform very basic operations between two numbers, with those operations being LDA, STA, ADD, INC, CLR, and JMP.

Here is a comprehensive project writeup for the processor: rrosal.com/files/trisc/RolandoRosales2441ProjectReport.pdf

This page is still under construction, however the full project source HDL code is available in the link above on GitHub.